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    Here my /drivers/tty/serial/imx.c.

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    I decided doing it the last way and checking for a "linux,rs485-enabled-at-boot-time" inside the device tree uart definition (e.g. like the atmel or omap drivers are doing this). If anybody is interested I can send the modified drivers/tty/serial/imx.c file without warranty (it's working for me). I was not able to attach the file directly to this post. How to do this??

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    No idea? It's getting urgent.

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    Thanks for answering. I got it working while booting in u-boot. The time between the kernel muxing the pin to UART and my firmware is starting still is too long. So I muxed the pin to GPIO in device tree too. Now the pin is low while complete booting and kernel starting. The problem now is how do I remux the pin to UART in my firmware before opening the UART. If I leave the pin as GPIO the UART is working without the RTS signal only. Are there functions for remuxing the pins at runtime? Is there…

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    Thanks for that explanation. But what does it mean for me? So I guess what to do now is adding something like this to board_init in u-boot:Source Code (10 lines) And do I have to control this pin manually in kernel startup again or does the kernel leave the state as it was set by u-boot?

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    Seem to make no difference. Any other idea?

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    RTS seems to be high while booting because on UART with RTS/CTS this will indicate the receiver is not ready. What if I would change the following device tree configuration Source Code (13 lines) to Source Code (13 lines) If I understood the documentation correctly this would enable a 100kOhm pull down instead of a 100kOhm pull up. Could this help without messing up the whole configuration/functionality? Or is there a better way to ensure MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B to be low while bootin…

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    Dear support-team, we're using armstoneA9 ttymxc3 for RS485 (Modbus RTU). We have connected RX/TX to R/D as well as RTS to enable RE/DE on a SN65HVD10 transceiver. It's working perfect but while booting sequence. The problem seems that while booting the RTS is enabling driving the bus lines on the transceiver. This will disturb communication of all other devices for some seconds. How can I invert this RTS line while booting on U-boot and inside the kernel so that the driver will be disabled? Tha…

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    Dear support-team, when I try to rotate the screen content (180°) on armstoneA9 by:Source Code (1 line) nothing happens. Writing a 1 (normaly will rotate by 90°) is flipping the screen vertically. A look into /drivers/video/fbdev/mxc/mxc_ipuv3_fb.c is showing why this happens: Source Code (1 line) Are there plans to include roation (at least 180°) into the driver? Thanks for hints.

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    Thanks. It's working the first way with muxing the PADS first.

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    Thanks. It's working that way.

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    Thanks for your answer. SD is working in u-boot and in kernel. I know how to update kernel and rootfs from SD but I do not know how to update u-boot from u-boot. Any hint?

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    Dear support-team, I want to set pin 32 of gpio expander (armstoneA9) to high level in u-boot. I added following lines to function board_init into file board/F+S/fsimx6/fsimx6.c Source Code (2 lines) The pin value still is at 0V while booting (also before kernel is starting). Any idea? Thanks.

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    Does it mean that if we go into production with 100+ devices we have to load u-boot, device tree and rootfs manually by typing the commands into putty?

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    Dear support-team, on armstoneA9 sd-card will not be found in nboot. Version: "F&S Nand Loader VN29 built Aug 9 2016 11:40:32" "armstoneA9 Rev. 1.10" I tried with 4GB and 2 GB micro-sd. Any idea? Thanks. EDIT: For now it seems sd-card is not working at all (even in u-boot and in kernel).

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    Dear support team, we are creating/have created an additional base board for armstoneA9 with power supply and some additional interfaces and connectors. It would be nice if you would tell us where to get the 34 pin ESDCI ICD connector that fits into the armstone RGB connector socket. We would prefer the SMD connector that is also used as J2 on your ASTONE-ADP-EDT1 board. Thanks for any hints.

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    It's working this way. Great job. Thanks again.

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    Thanks for your detailed answer. I guess I understand. I thought it's possible because on armstoneA9r2 these pins are used this way but I see that the wiring to the GPIO extender is completely different (between A9 and A9r2). Please one last question to this topic: How to use the pins 19,20,23,24 for full UART? Many thanks again for support.

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    No hint for me? At least where I have to take a look at? Device tree or kernel driver Thanks for any advice.

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    Thanks for information. How to do this for: RXD1 Pin 15 TXD1 Pin 13 RTS1 Pin 19 CTS1 Pin 21