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    Indeed. That is the solution. Thanks again for your help. You guy did a great job.

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    [1] shows the only change from my side regarding on modul nand flash in the F+S uboot sou res. I made a test and yes: If UBootEnv is 'rw' the bootloader is not able to access the nand flash. If I change the mode back to 'ro' my bootloader is working and can access the nand flash. Can you confirm this behavior on your side to? [1] in include/configs/fsimx6sx.h: /* Define MTD partition info */ #if CONFIG_SYS_MAX_NAND_DEVICE > 1 #define MTDIDS_DEFAULT "nand0=gpmi-nand0,nand1=gpmi-nand1" #define MTD…

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    Yes. It is only a modified version of the original F+S uboot image. I tried not to change any FLASH related options (only make UBootEnv rw). But my image only access the nand flash when I use the enviroment on the original uboot image from F+S. As you can see in [1] there is no difference in variable mtdparts. The command "mtdparts" shows the same behavior as you can see in [2]. [1]: myUBOOT: mtdparts=mtdparts=gpmi-nand:256k(NBoot)ro,768k(UserDef),256k(Refresh)ro,768k(UBoot)ro,256k(UBootEnv)rw,8…

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    Hello gentleman, I made some changes in uboot. But nothing regarding the flash nand memory (to my way of thinking). But afterwards I can not access the nand flash any more. I also checked the original uboot from F+S and compared the sourced and enviroment variables. My modified UBootEnv can be seen under [1]. I also noticed that some variables are not there anymore (see [2]). But when I set them and try to work with the nand flash they disappear and I get the following error: unexpected characte…

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    Finally, the release is out and I am happy. The documentation provides clear instructions and after building the new image and bootloader with the examples, every things works fine. Thanks so far. END.

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    But coreutils increase disk usage about 1 MB. better option: updated busybox to version v1.26.2 (contains fix for stty)

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    The source of the UART baud rate problem was the stty command of the used busybox- tools (v1.24.2). A work a round to fix the problem was to install the coreutils including stty that smoothly did the job. buildroot: -> Target packages -> Show packages that are also provided by busybox -> coreutils Furthermore, I initiated a bug report @ [1] to get the busybox tools fixed. [1]: bugs.busybox.net/show_bug.cgi?id=10456 ------------------------------------------------------ P.s.: How can I close this…

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    I also checked the supported baud rates in my setting up to 4 Mbps: Source Code (21 lines)

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    Hi, I also checked the UART CLOCK SPEED for all serial interfaces on the SKIT: Source Code (8 lines) All activated UARTs, from the F+S image, works with 80 MHz.

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    Thanks for the reply. I checked to set the baud rate in a C program. As shown below the baud rate of 1 Mbps worked fine with a externel USB Adapter (FTDI Chip): Source Code (3 lines) But with the internel UART_C the same program runs without any errors but sets the baud rate falsely to "0" (see line 2. in RESULT). Source Code (3 lines) Result for internel UART_C: Source Code (8 lines) Therefore, it is also unknown for me who generates this error (stty: invalid argument '1000000'). Where can I fi…

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    Hello, I tried to set the baud rate of a UARTs to 1 Mbps on the SKIT: Source Code (2 lines) I checked "/dev/ttymxc0", "/dev/ttymxc2", "/dev/ttymxc4" and "/dev/ttymxc5". No one accept the configuration of 1 Mbps. But 921600 bps and slower is working fine. According to the "i.MX 6SoloX Applications Processor Reference Manual" chapter "1.4 Features", all UART interfaces supports up to 4 Mbps. Source Code (1 line) Can any one hint me to the part that limits the UART baud rate?

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    Today 6 weeks are over and there is no fsimx6sx-V2.1 release on the server yet. How long will it take to release version 2.1 approximately? Thanks.

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    Status so far: Multicast works: Source Code (3 lines) Than I spend some time by "try and error" with all bits of the gaddr register. The bit to control if a LLDP frame will be rejected or accepted are is the following: Source Code (4 lines) Furthermore, I checked community.st.com/thread/24942 to calculate the correct Hash for fec with the LLDP multicast address { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x0e }. It seems to be 0x1E. But I do not know how to split/convert this hash for gaddr1 and gadd2 in "d…

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    Quote: “How can I force U-Boot to use only one Ethernet interface for example FEC0? Because if FEC0 fails it continues with FEC1.” I tried the following MAKRO in "include/configs/fsimx6sx.h". CONFIG_NET_DO_NOT_TRY_ANOTHER But if FEC0 is not connected or the counterpart is dead (starting switch) it still switch to interface FEC1. Is there an other option?

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    I found the hash calculation definition in [2] and the calculation algorithm in [1]. I rewrite [1] to [3] and get a hash_high: 0x0 and hash_low: 0x400000. But this values does not let the FEC driver accept LLDP multicasts. Is [1] a generic algorithm for all FEC drivers, does it suit the efusA9X board? Or is my calculation in [3] incorrect? How can I force U-Boot to use only one Ethernet interface for example FEC0? Because if FEC0 fails it continues with FEC1. [1]: FEC Hash calculation: elixir.fr…

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    Hello, I tried to use the CDP command in UBOOT and also implemented a LLDP command. Both commands send CDP or LLDP messages. The problem for me is that UBOOT does not receive any multicast (CDP, LLDP) Ethernet packets. This seems similar to this thread: forums.xilinx.com/t5/Zynq-All-…ve-data-uboot/td-p/681131 Other protocols/commands works normal...like tftp, ping…and so on. Where is the function that receives the Ethernet frames for the efusA9X defined? Is it "drivers/net/fec_mxc.{c,h}"? How ca…

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    Case closed. See above.

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    Thanks for your help. Now every thing is working great. I configured all PADs as recommended. The error "force_idle_bus: sda=1 scl=0 sda.gp=0x3 scl.gp=0x2" and "force_idle_bus: failed to clear bus, sda=1 scl=0" are gone. All i2c buses works in UBOOT. Below the needed changed to enable I2C in UBOOT for the efusA9X / fsimx6sx: (NOTE that the 5µs delay is specific for my EEPROM) Difference-File (11 lines) Difference-File (87 lines)

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    UPDATE: After changing the addr to 0x7F (see github.com/boundarydevices/u-b…rogen6x/nitrogen6x.c#L915) I was able to access the i2c bus 0 and 2: setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); The error from bus 0 (I2C_C) is still present. But the bus works: Source Code (2 lines) The bus number 1 is still not working, but the error message has changed to: Source Code (8 lines)

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    Hello, I edited board/F+S/fsimx6sx/fsimx6sx.c according board/freescale/mx6sabresd/mx6sabresd.c and arch/arm/include/asm/arch/mx6sx_pins.h (for the PADs). I also enabled the i2c and the eeprom command in uboot for debugging. I am able to compile UBOOT. But there is no way to access the I2C bus. Please give me a hint what is wrong or how I can check/debug my errors. The hardware is fine. In LINUX the EEPROM can be read and write out of the box. COMMANDS: Source Code (3 lines) Source Code (7 lines…