ov7740 camera on efus-A9-V3 board using CSI0 in HREF (gated clock) mode

      ov7740 camera on efus-A9-V3 board using CSI0 in HREF (gated clock) mode

      Hi all,

      I'm using an efus-A9-V3 board (starterkit) with an Omnivision ov7740 camera connected through the parallel interface in 8 bit HREF (gated clock) mode.
      I'm using the fsimx6-Y0.1 build.

      Connections:
      ov7740 - i.MX6
      Y0 - N.C.
      Y1 - N.C.
      Y2 - CSI0_DAT10
      Y3 - CSI0_DAT11
      Y4 - CSI0_DAT12
      Y5 - CSI0_DAT13
      Y6 - CSI0_DAT14
      Y7 - CSI0_DAT15
      Y8 - CSI0_DAT16
      Y9 - CSI0_DAT17
      PCLK - CSI0_PIXCLK
      HREF - CSI0_MCLK
      VSYNC - CSI0_VSYNC
      XCLK - GPIO_0
      SIOC - CSI0_DAT9
      SIOD - CSI0_DAT8

      I started with the driver posted in the thread below by aurelien bouin.
      community.freescale.com/thread/328880
      This driver is based on the ov5640 camera

      I know i should use CSI0_DAT12 - CSI0_DAT19 for 8 bit mode but it is not possible with the current hardware.
      To solve this I'm trying to use CSI0 in 10 bit mode and ignore the two LSBs.

      I changed the device tree:

      ov7740: ov7740@21 {
      compatible = "ovti,ov7740";
      reg = <0x21>;
      pinctrl-names = "default";
      pinctrl-0 = <&pinctrl_ipu1_2>;
      clocks = <&clks 201>;
      clock-names = "csi_mclk";
      csi_id = <0>;
      mclk = <24000000>;
      mclk_source = <0>;
      };

      v4l2_cap_0 {
      compatible = "fsl,imx6q-v4l2-capture";
      ipu_id = <0>;
      csi_id = <0>;
      mclk_source = <0>;
      status = "okay";
      };

      ipu1 {
      pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
      fsl,pins = <
      MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x130B0
      MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x130B0
      MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x130B0
      MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x130B0
      MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x130B0
      MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x130B0
      MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x130B0
      MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x130B0
      MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x130B0
      MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x130B0
      MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x130B0
      MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x130B0
      MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x130B0
      /* MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 */
      >;
      };
      };

      /* This is default */
      ipu1: ipu@02400000 {
      compatible = "fsl,imx6q-ipu";
      reg = <0x02400000 0x400000>;
      interrupts = <0 6 0x4 0 5 0x4>;
      clocks = <&clks 130>, <&clks 131>, <&clks 132>,
      <&clks 39>, <&clks 40>,
      <&clks 135>, <&clks 136>;
      clock-names = "bus", "di0", "di1",
      "di0_sel", "di1_sel",
      "ldb_di0", "ldb_di1";
      resets = <&src 2>;
      bypass_reset = <0>;
      };

      I also made some changes in the ov7740 camera driver:
      in the ioctl_g_ifparm function:
      p->u.bt656.frame_start_on_rising_vs = 1;/* Not handled by imx */
      p->u.bt656.bt_sync_correct = 1; /* Indicate external vsync */
      p->u.bt656.latch_clk_inv = 0; /* 1 : clock on falling edge */
      p->u.bt656.nobt_hs_inv = 0;
      p->u.bt656.nobt_vs_inv = 0;
      p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_10BIT;
      /* p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT; */
      /* p->u.bt656.clock_curr = ov7740_data.mclk; /* external clock */

      After building and testing with avconv, the VIDIOC_DQBUF ioctl keeps failing. It looks like there are no interrupts received from the IPU and enc_counter in mxc_v4l2_capture.c is never incremented.

      The signals on the camera board look OK.
      MCLK: 24MHz 3,3V
      All other signals are 1,8VPIXCLK: 24MHz
      HSYNC 15KHz
      VSYNC: 30Hz
      Signals around 12MHz on parallel data lines

      I've enabled debugging and added the boot output and avconv output as an attachment.
      Below is a dump of the relevant registers:
      IOMUXC_GPR1 0x48601005
      IOMUXC_GPR13 0x0000000C

      IOMUXC_SW_MUX_CTL_PAD_CSI0_* 0x00000000 (same for all CSI0* pins)
      IOMUXC_SW_PAD_CTL_PAD_CSI0_* 0x000130B0 (same for all CSI0* pins)

      IPU_CONF 0x00000761
      IPU_CSI0_SENS_CON 0x04009900
      IPU_CSI0_SENS_FRM_SIZE 0x01DF027F
      IPU_CSI0_OUT_FRM_SIZE 0x01DF027F

      I read the BSP porting guide and a some of IPU/camera related posts on the freescale forum.
      I also tried different settings, but none of them worked for me.
      Any advice?

      Thanks in advance,
      Thomas
      Files
      • output.txt

        (92.73 kB, downloaded 360 times, last: )

      Post was edited 5 times, last by “T.Quartier” ().