Posts by RSchubert

    How to get the toolchain from Yocto?


    Code
    1. bitbake –c populate_sdk fus-image-std
    2. Loading cache: 100% |########################################################################################################################################| Time: 0:00:00
    3. Loaded 4750 entries from dependency cache.
    4. Parsing recipes: 100% |######################################################################################################################################| Time: 0:00:00
    5. Parsing of 3203 .bb files complete (3201 cached, 2 parsed). 4752 targets, 302 skipped, 3 masked, 0 errors.
    6. ERROR: Nothing PROVIDES '–c'

    After multiple tries I succeeded downloading and building all packages. So now I have a compiled Uboot, Kernel, Device Tree, Filesystem.

    The resulting directory now is 340 GB (crazy for expected embedded images of 32 MB at all).


    Question: How to configure the filesystem now? Is there some kind of gui for selecting/deselecting the packages similar to buildroot menuconfig?


    Thanks in advance.

    Dear Support-Team,


    why not using good old Buildroot for i.MX8MP platform? After 5+ years working with your i.MX6 devices I understood Buildroot very well including configuring/updating/adding packages. Now the i.MX8MP platform comes with Yocto release ;(. While building the standard image for the first time I got following error fetching the gstreamer packages:

    Code
    1. ERROR: gstreamer1.0-1.20.3.imx-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'gitsm://github.com/nxp-imx/gstreamer.git;protocol=https;branch=MM_04.07.02_2210_L5.15.y')

    This happened around package 1000 of more than 6000 packages. The directory now already fills about 20 GB.

    How to fix this error?

    Is there a chance to have a Buildroot release too for this platform?


    At least I hope as a result of Yocto I will get a Toolchain, that I can use to compile U-Boot and Kernel with our own configurations (menuconfig). Also somehow we need to do our own minimal Yocto configuration for a framebuffer version (no X, no wayland). But first we need to get baking the standard image working...


    Thanks in advance.

    Hi, I also remember an issue with the serial port in the new 5.4.70 kernel (RS485). If I remember correctly I fixed this by setting the FIFO to 1 byte (instead of the default value) in the device tree. This is may be only a workaround until a better solution was found:


    rx_fifo_trig = <1>


    Code
    1. &uart4 {
    2.     pinctrl-names = "default";
    3.     pinctrl-0 = <&pinctrl_uart4_1>;
    4.     uart-has-rtscts;
    5.     fsl,rx_fifo_trig = <1>;
    6.     linux,rs485-enabled-at-boot-time;
    7.     status = "okay";
    8. };

    Yes, I tested and you are right (it's also new to me). On a cold start this effect does not occur only after software reboot. But that's also a problem for us, because our customers create projects for our devices and every time they load the projects, the device reboots.


    Kind regards

    Dear support team,


    on our armstoneA9r3 sample with Buildroot fsimx6-B2022.10 release we have the effect/problem of some noise on the Audio Line Out while loading the kernel until the audio output is initialized. Can someone confirm that effect? If yes, what do we need to change in the device tree or in u-boot to initialize the Audio Line Out pins to silence while booting?


    Thanks in advance

    RS

    Tested with with armstoneA9r3 sample on our existing devices and got it working so far.

    (Tested: Ethernet / USB / I2C (Touchcontroller) / RGB / LVDS / Sound / UART / µSD)

    Hint: Please mind using the new devicetree files armstonea9r3.dts and relating !

    Dear Support-Team,


    how long do you think the development will take? We have our whole system built on the 2021.10 release. We waited for months for the hardware - now we at last have a sample board but with an "old" software release only. We get in deep trouble. Help needed!


    Kind reagards

    Dear Support - Team,


    are there changes for the Buildroot Release fsimx6-B2021.10.1 regarding the new PHY on armstoneA9r3 too? Or is this release working out of the box? As I see the Realtek PHY is disabled in the kernel config yet (but maybe we did this by our own).


    Kind regards


    OK, thanks. We will try.

    Another question for creating the cable is: What channel is for odd pixels, what is for even pixels?

    If we make a 1:1 cable, channel 0 will be odd and channel 1 will be even pixels (I would expect it the other way).

    Who can tell us?

    Thanks

    Yes, it's working with the "reg_ldb_bl" now. I can control the pwm backlight on pin 32 now.

    It seems the lbd-backlight will be disabled when no LDB interface is used and lcd-backlight will be disabled when no LCD interface is used.

    That makes sense but seems different to the 3.1 release.


    Thanks for your help.

    With this device tree I don't even get a sysfs directory for backlight (/sys/class/backlight is empty).

    I'm using the RGB LCD port.


    Code
    1. backlight_lcd {
    2.     compatible = "pwm-backlight";
    3.     power-supply = <&reg_lcd_bl>;
    4.     pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
    5.     brightness-levels = <1 0 60 63 66 69 73 77 82 87 93 100 107 114 121 128 135 142 149 156 163 170 177 184 191 198 205 215 225 235 245 255>;
    6.     default-brightness-level = <31>;
    7.     fb-names = "lcd";
    8. };

    I tried "#pwm-cells = <3>;". The result is that the backlight is off instead on like before. The brightness again cannot be controlled. When using "pwm-cells = <3>;" without the # the ruslt is that the backlight always is on but cannot be controlled.

    If I change backlight control in device tree back to pwm3, I can control pwm1 (pwmchip0) in sysfs. Depending on the values duty_cycle/period I can dim my backlight correctly. But writing values to backlight/brightness in sysfs will not affect an pwm output on pwm3 now (4 pin backlight connector pin 3 to pin 4 always is 3.3V no matter what brightness I set).

    Yes, I'm using pwm1 (connector pin 32) instead of pwm3. That was working on Buildroot release 3.1.

    I guess pwm1 is on /sys/class/pwm/pwmchicp0. I cannot export channel 0 on pwmchicp0 ("Device or resource busy") because it is used by the backlight.

    I can control pwmchip1 / pwmchip2 / pwmchip3 in sysfs and view the result on oscillator.

    As written before, there is a kernel message while booting.

    Code
    1. ldb-bl: disabling

    Maybe that's the cause of the problem but I don't know what is disabling the ldb-bl.

    armstoneA9. PWM in general is working. I can control the PWM period on all other PWM ports/pins by writing the values to the sysfs. That's not possible on PWM0 because it's used/blocked by the backlight control. Writing values to /sys/class/backlight/backlight_ldb/brightness has no effect.

    Dear Support Team,


    I'm still dealing with the non working PWM1 backlight on pin 32 :(. What does the following kernel message mean?


    Code
    1. ldb-bl: disabling

    Here my device tree part:

    Code
    1. /* LVDS backlight PWM on LVDS connector and backlight connector */
    2. backlight_ldb { compatible = "pwm-backlight"; power-supply = <&reg_ldb_bl>; pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>; brightness-levels = <1 0 60 63 66 69 73 77 82 87 93 100 107 114 121 128 135 142 149 156 163 170 177 184 191 198 205 215 225 235 245 255>; default-brightness-level = <31>; fb-names = "ldb0", "ldb1";
    3. };

    Is there anybody who can confirm working or not working backlight PWM?

    Thanks in advance.