F&S Support Forum

Hello,

did you find a way to reproduce the issue faster? Maybe with high loads?

We do not configure the HW-PHY-RESET pin in linux to keep the settings from U-Boot while booting.
Could you try to reset the PHY "by hand" an see if it starts again in…

(Quote from WaSt)

We have observed that the +3V3 voltage of the baseboard may be fed back via the serial level shifter to some GPIOs of the SoC. This in turn holds the SOM voltage VDD_3V3 on some middle value of around 1.5V, despite the fact that the…

Hello,

we were testing the last couple of days. The error happens with and without PoE on our baseboard. The eth0 link suddenly switches to down (fec 30be0000.ethernet eth0: Link is Down). We recognize this as soon as our external client application…

Ok, good to know.
But the waveform shown in my last answer comes directly from the SoM Pin J1_54, which shouldn't be affected by +3V3 generated on the baseboard (PicoCoreBBDSI), right?
It is pin 8 on the feature connector.
It is directly connected to the…

the 3.3V voltage regulator on the base board is controlled by the 3.3V output of the PicoCore.
The PicoCore PMIC disables the 3.3V on the PicoCore during reset and the 3.3V on the base board is switched off.
But if voltage from the base board is fed…

We have updated our OSM design data library!
It now contains information for Cadence(R) and ALTIUM^(R).

1. Schematic

• Cadence library (fs_osm.olb) including:
  • general OSM symbol (V1.1, V1.2, size S)
  • symbols of F&S OSM modules (module-specific

…

Hello,
here is CPU/Board info of one of the modules (MAC 00:05:51:1A:A4:BC):
CPU: Freescale i.MX6SX rev1.4, 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C)
Reset: POR
Board: PicoCOMA9X Rev 1.20 (LAN, 1x DRAM)
…

So I tried the same setup with an external pull-up with the PicoCoreBBDSI and it behaved the same...
I then took a look at the behaviour of a GPIO without any external connections and found something interesting:

Setup:
PicoCoreBBDSI (v1.4) +…

A software partition is only required for boards that boot from eMMC, like the PicoCoreMX6UL. However, the PicoCOMA7 boots from NAND. So no partition is required, only MTD-partitions are necessary there, but they are completely handled in U-Boot. So…

Hello,

we have run an ethernet test over the weekend and it still worked after 60 hours. Do you have any new insights?

Your F&S Support Team