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hhdrake
Posted the thread IMX8MP integration.ThreadHi,we would be interested in integrating the Ara240 into our IMX8MP based solution. Questions are:- Does the M.2 Ara240 support PCIe Gen3 x1 link negotiation when only lane 0 is connected?
- our current PCIe is A+E key, would this be sufficient to adapt to
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Mehul Mitha
Like (Post)Hi Ajith Ali ,
You can only use SPI_B in linux, see:
https://github.com/FSEmbedded/…-mx8ulp.dtsi#L45C1-L45C31
I assume, that you are allready using SPI_B.
SPI_A (FLEXSPI) does not have a linux RPMSG driver and is currently not useable via Linux.
Also… -
fs-support_CS
Replied to the thread Clarification Required on FS-OSM hardware and application note documents.PostHi Ajith Ali ,
You can only use SPI_B in linux, see:
https://github.com/FSEmbedded/…-mx8ulp.dtsi#L45C1-L45C31
I assume, that you are allready using SPI_B.
SPI_A (FLEXSPI) does not have a linux RPMSG driver and is currently not useable via Linux.
Also… -
Ajith Ali
Replied to the thread Clarification Required on FS-OSM hardware and application note documents.PostHi Team,
Currently, SPI_A is working fine through the client interface with the following configuration from the M33 RPMsg:
spidev0_rpchip: spidev-rpbus-0 {
compatible = "spi_rpbus";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
Likewise, we… -
BSenkel
Replied to the thread i.MX6 Yocto Release Y2026.06 (Yocto 5.0).PostHello,
Just to confirm, can the latest Yocto release here be used with the QblissA9r2-V2-LIN board (Qseven standard)?
Thank you. -
fs-support_CS
Replied to the thread FS 8ULP OSM-SF – Clarification on UART port to core mapping (A35 / M33).Post(Quote from Ajith Ali)
I just noticed that, although UART_C is marked as DBG in the hardware documentation, UART_B is used as DBG in the realtimed firmware.
This means that in Linux, only UART_C and UART_D from RTD can be accessed.
If you also want to use… -
Ajith Ali
Replied to the thread FS 8ULP OSM-SF – Clarification on UART port to core mapping (A35 / M33).PostHi Team,
We need some clarification regarding OSM_UART_B, which is routed to the Cortex-M33.
By default, this OSM_UART_B is not enabled in the DTS files, so we have enabled it as shown below:
osm_eth_a: &fec {};
osm_uart_con: &lpuart5 {}; /* A35 console… -
fs-support_CS
Replied to the thread Clarification Required on FS-OSM hardware and application note documents.PostHi @Bharath,
SPI_A (FLEXSPI) and SPI_B (LPSPI) comes from the Cortex-M33 Domain.
SPI_B can be controlled in linux via rpmsg -
Bharath
Replied to the thread Clarification Required on FS-OSM hardware and application note documents.PostThanks.
I would like to clarify the SPI configuration in OSM.
There are two SPI interfaces, SPI-A and SPI-B. Are both interfaces controlled by either the Cortex-M33 or Cortex-A35? -
fs-support_CS
Replied to the thread Clarification on Cortex-M33 FreeRTOS Integration and Build Process.PostHi @Bharath,
1. We use currently MCUXpresso SDK 2.16
2. You can find the source code here:
https://github.com/FSEmbedded/realtimed
3. Yocto is unable to generate builds for different architectures as defined in the machine configuration. Therefore, Yocto…