Shared memory does not work anymore after update to release Y2024.07

  • Hello,


    we use shared memory to exchange data between the Cortex-A and Cortex-M cores. For that, the Cortex-M (running a bare-metal program) accesses the address 0x80000000 directly, whereas the Linux application (running on the Cortex-A) uses mmap to map 0x80000000 into its virtual address space. The Cortex-M program is started by the Linux application via remoteproc.


    This worked fine with the previous release (Y2023.09), but not with the current release anymore. As long as the program on the Cortex-M is running, the access to the shared memory is apparently denied for the Cortex-A. Any write attempt has no effect, and all reads return just the value 0. Interestingly, after the Cortex-M program gets stopped (again via remoteproc), the access to the memory becomes possible again. Thus, with pseusocode, the situation looks like this for the Cortex-A:


    write 42 into 0x80000000

    read 0x80000000 -> 42

    start Cortex-M

    read 0x80000000 -> 0

    write 123 into 0x80000000

    read 0x80000000 -> 0

    stop Cortex-M

    read 0x80000000 -> 42


    As a side note - in the given example the Cortex-M program correctly reads "42" from the address 0x80000000, which proves that the Cortex-A wrote to the correct address, and that this worked until the Cortex-M was started.


    In the devicetree, I enabled the Cortex-M with "#define SUPPORT_M7". In addition to that, I had to adjust the dtsi file in the previous release, to reserve the memory region for the M7 ("m4_reserved..."). This adjustment became part of the current Y2024.07 release, so there is no change in the dtsi file anymore.


    The M7 toolchain has been updated to the current freertos-fsimx8mp-V2024.09 release. Shared memory still works when the Cortex-A runs with the Y2023.09 Yocto release, but not with Y2024.07.


    I tried several things (e.g. mmap before/after the Cortex-M has started), but all failed. Now I'm running out of ideas. Can you help?

  • I desperately continued to work on this issue, and I found out that the problem seems to be caused by NBoot and/or UBoot. After downgrading both to the previous version (U-Boot 2021.04-F+S-fsimx8mp-Y2023.09, NBoot: 2023.09), but keeping everything else (devicetree, kernel, rootfs) from the Y2024.07 release, shared memory works again as expected. And I did also the cross check - after updating NBoot and UBoot to the versions from the Y2024.07 release, shared memory did not work anymore even with the devicetree, kernel and rootfs from the Y2023.09 release. So, do I have to configure something in UBoot to make it working again? Btw, still I have to set the extra bootargs "clk-imx8mp.mcore_booted clk_ignore_unused" in U-Boot to be able to start the Cortex-M with remoteproc (Starting M7 from Linux freezes the system (U-boot prepare_mcore is missing)).

  • Hello,


    thank you for reaching out to us. The Information you gave in this thread will help us finding a solution. We will take a look at this and answer this thread as soon as we have new Information.


    Your F&S support team.

    F&S Elektronik Systeme GmbH
    As this is an international forum, please try to post in English.
    Da dies ein internationales Forum ist, bitten wir darum, Beiträge möglichst in Englisch zu verfassen.

  • Hello,


    after investigating we have found a solution. In fsimx8mp-Y2024.07 we added RDC (ressource domain controller) configurations. These change which Domain has access to which part of the System. The Memory you are using is only accessible by the M7-Core after it is started. After stopping it, the Memory Configuration will be changed to the default where all domains have access.


    To use the range as shared Memory you need to change a line in the file arch/arm/dts/picocoremx8mp-u-boot.dtsi (or the <boardname>-u-boot.dtsi of the board you are using)


    You will need to change line 31 from

    Code
    1. RDC_MEM_REGION 39 M4_DDR_START M4_DDR_END MEM_D0_ACCESS

    to

    Code
    1. RDC_MEM_REGION 39 M4_DDR_START M4_DDR_END MEM_D0D1_ACCESS

    this will grant both Domains access to the Memory when the M-Core is running.


    I appended a Patch with this change you can apply in uboot.


    Your F&S support team.

    Files

    F&S Elektronik Systeme GmbH
    As this is an international forum, please try to post in English.
    Da dies ein internationales Forum ist, bitten wir darum, Beiträge möglichst in Englisch zu verfassen.