Thank you! This seems to have solved my issue.
Posts by heing
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After some more investigation, I've found out that the problem depends on the length of the payload. I have short circuited RX and TX on port ttymxc2 and run the following python script (requires pyserial):
The code produces the following output:
Length 9 failed
Length 18 failed
Length 27 failed
Length 36 failed
Length 45 failed
Length 54 failed
Length 63 failed
Length 72 failed
Length 81 failed
Length 90 failed
Length 99 failed
All requests of length dividable by 9 are lost. This happens on kernel 5.4.70, but not on 4.1.15. Is anyone able to reproduce this behavior?
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I have a sensor connected to /dev/ttymxc2 and this works fine with kernel 4.1.15. After upgrading to kernel 5.4.70, the communication stops working. The sensor uses a binary protocol with request and reply. After the upgrade, some of the replies from the sensor are lost, but some are still received. This is consistent. Certain commands always work and others never work. Typical for commands that doesn't work is that the delay before response is higher, 20-30ms.
I've verified with an oscilloscope that the sensor sends the response.
I use pyserial, but I've also verified the issue using stty and dd.
Is there any reason why serial communication behaves differently in the two kernel versions? Kernel configuration and devicetree is unchanged.
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Where can I find information about the armStoneA9r3 board?
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If you don't care about patches from F&S, you can use a vanilla Buildroot. Just use the F&S kernel. We use Buildroot version 2017.11.2 without any problems. I have also booted Debian 9 from sd card without much trouble, but I haven't had a chance to test it. Btw, official Debian 9 support would be cool and would enable us to run things like Azure IoT Edge on the board.
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Another question:
The GPS sends the 1PPS signal on pin 42 (LED_WWAN) and pin 46 (LED_WPAN) on the Mini PCIe connector. Is any of these pins connected to the CPU so I can read it using GPIO?
Kind regards,
Hein Gustavsen
Miros AS -
Thank you! I knew about the USB interface, but I was so caught up in the PCI error message that I did not think about trying USB. I had to enable USB_ACM in the kernel (USB Modem (CDC ACM) support) and then I got the /dev/ttyACM0 device as expected.
Thank you for helping me resolve this issue!
Kind regards,
Hein Gustavsen
Miros AS -
Is the 1.5V voltage used by the module?
Thank you for this tip. The GPS receiver does not use 1.5V as far as I can see.
Our armStoneA9r2 does not provide 1.5V on the PCIe socket, but I guess that this is not the problem here. I will wait for you to test the PCIe interface and provide me with the correct kernel and device tree configuration.
Kind regards,
Hein Gustavsen
Miros AS -
For which field of application do you need it?
We use an Advantech EWM-G108H PCIe GPS module.Kind regards,
Hein Gustavsen
MIros AS -
Any news on this?
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Thank you!
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Thank you. Software I2C on GPIO pins works fine for me.
Kind regards,
Hein Gustavsen
Miros AS -
Jonas, did you manage to get the PCIe running?
F+S: What is the current status for PCIe on armStoneA9r2? Do you have any patches or do you plan to include support in the upcoming release?
I plan to use a PCIe GPS receiver (USB).
Kind regards,
Hein Gustavsen
Miros AS -
This is still a problem. armStoneA9r2 contains GPIO reference card for armStoneA9.
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I am trying to use I2C on the armstone A9r2 (Quad) but I cannot determine which pins on the feature connector is used for I2C. The docs says that I2C is on pin 16 and 17, which is the same as SPI, but I cannot measure any activity on those pins. The device tree file has a comment that says Feature Connector (SKIT) on I2C_A and the pins are MX6QDL_PAD_GPIO_3__I2C3_SCL and MX6QDL_PAD_GPIO_16__I2C3_SDA, but I can't determine which pins this is on the feature connector. Do I need to set up another I2C bus for my device and in that case, which pins can I use?
Kind regards,
Hein Gustavsen
Miros AS -
I created this patch based on linux device tree values and this forum post:
details of u-boot reading support for efusA9 emmcDisplay MoreDiff- diff -Naur a/board/F+S/fsimx6/fsimx6.c b/board/F+S/fsimx6/fsimx6.c
- --- a/board/F+S/fsimx6/fsimx6.c 2016-08-08 19:07:02.000000000 +0200
- +++ b/board/F+S/fsimx6/fsimx6.c 2017-01-16 10:54:48.165815770 +0100
- @@ -475,6 +475,21 @@
- IOMUX_PADS(PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
- };
- +/* eMMC pads definition */
- +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
- + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(0x17071)),
- + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(0x10071)),
- + IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(0x1B071)),/* Reset eMMC, active low */
- +};
- +
- struct fsl_esdhc_cfg esdhc_cfg[] = {
- {
- .esdhc_base = USDHC1_BASE_ADDR,
- @@ -505,7 +520,12 @@
- return !gpio_get_value(IMX_GPIO_NR(6, 15));
- case BT_ARMSTONEA9R2:
- - return !gpio_get_value(IMX_GPIO_NR(1, 4));
- + if (mmc->block_dev.dev == 0)
- + /* External SD card slot has Card Detect (CD) */
- + return !gpio_get_value(IMX_GPIO_NR(1, 4));
- + else
- + /* On-board SD card slot has no Card Detect (CD) */
- + return 1; /* Assume card is present */
- case BT_PICOMODA9:
- if (mmc->block_dev.dev == 0)
- @@ -612,6 +632,12 @@
- index = 0;
- break;
- + case BT_ARMSTONEA9R2:
- + SETUP_IOMUX_PADS(usdhc3_emmc_pads);
- + ccgr6 |= (3 << 6);
- + index = 2;
- + break;
- +
- default:
- return 0; /* No more SD card slots */
- }
I can now read the eMMC, but I don't know the meaning of the ccgr6 value. Could you please explain?
Kind regards,
Hein Gustavsen
Miros AS -
Thank you for your reply. In my case, reading the eMMC would be sufficient since the writing is only done from Linux.
With R2, the NAND is actually big enough for a recovery partition. I will investigate that.
Kind regards,
Hein Gustavsen
Miros AS -
Do you plan to include support for the eMMC on armStoneA9r2 in u-boot?
There is a post containing some information on how to do this with the efusA9 board:
details of u-boot reading support for efusA9 emmcI need to use eMMC for temporary storage when upgrading the root file system using the u-boot update command. I use the SD card for this today, but I would like to get rid of that dependency.
Kind regards,
Hein Gustavsen
Miros AS -
Hi. I think you misunderstand how Windows Subsystem for Linux works. This is an Ubuntu 14.04 installation with a modified kernel that runs on top of Windows. It uses the Ubuntu 14.04 64-bit binaries (bash, etc.) but cannot run 32-bit ELF binary, which your compiler is. The file system is separate from Windows' own filesystem. It uses slashes (/) and is case sensitive. The windows drives are available in /mnt/c, /mnt/d, etc.
If you have a Windows 10 computer available, you should try yourself. Check out this information:
https://msdn.microsoft.com/en-us/commandline/wsl/aboutI primary use Linux for cross compiling, but I also use Windows for development and could be handy to be able to cross compile on Windows Subsystem for Linux too.
Kind regards
Hein Gustavsen
Miros AS -
The Windows Subsystem for Linux (WSL) included in Windows 10 does run native 64-bit ELF binaries, but not 32-bit. I think a 64-bit version of your toolchain will run fine on Windows 10.
