Posts by andreas.paulun@i-graphx.com

andreas.paulun@i-graphx.com · Oct 19th 2023

well what would help? except a bigger cooling surface / active cooling.

is it possible to disable the gpu/vpu on the fly, or is cpu standby an option.

andreas.paulun@i-graphx.com · Oct 17th 2023

We have the following problem: our processor produces a lot of heat and our hardware engineer thinks that clocking down might help,

is there any way to clock the processor down?

andreas.paulun@i-graphx.com · Nov 24th 2022

Any update on this?

andreas.paulun@i-graphx.com · Oct 25th 2022

it works with the following (dirty) method:

Code

@@ -594,6 +595,12 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
spi_imx->spi_bus_clk = clk;
+ if (gpio_is_valid(spi->chip_select)) {
+ gpio_direction_output(spi->cs_gpio,
+ spi->mode & SPI_CS_HIGH ? 0 : 1);
+ spi_imx_chipselect(spi, BITBANG_CS_ACTIVE);
+ }
+
/*
* ERR009165: work in XHC mode instead of SMC as PIO on the chips
* before i.mx6ul.

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andreas.paulun@i-graphx.com · Oct 24th 2022

We are using your latest fedora build vm with Yocto fsimx8mp-Y2021.07.2 with the linux kernel linux-5.4.70-fus

andreas.paulun@i-graphx.com · Oct 18th 2022

Please, we need your feedback. Since the

8. September 2022

we are working on this little part without success. We need your support. We have quite a lot of systems here waiting for this solution and we would like to buy lots more.....if we could make it run.

andreas.paulun@i-graphx.com · Oct 17th 2022

any other suggestions?

Still didn't manage to get this thing working...

andreas.paulun@i-graphx.com · Sep 30th 2022

i know that, already renamed the folder.

And i could boot perfectly fine before the Patch, this should not be the issue here.

andreas.paulun@i-graphx.com · Sep 29th 2022

Now the kernel is stuck..

See attached log

andreas.paulun@i-graphx.com · Sep 23rd 2022

when i send some data, the gpiochip2 gpios switch to out, but only with the spidev driver...
When i switch back to ltc2632 they stay in

andreas.paulun@i-graphx.com · Sep 22nd 2022

With 0x40000156 on all cs, the gpio1 15 seems to work.

i had already commented the line in the hog group so this should not be an issue.

here is the output of the dmesg command:

Code

[ 1.004068] spi_imx 30840000.spi: registered master spi0
[ 1.004176] spi spi0.0: spi_imx_setup: mode 0, 8 bpw, 2000000 hz
[ 1.004180] spi spi0.0: spi_imx_setup: cs -517
[ 1.004192] spi spi0.0: setup mode 0, 8 bits/w, 2000000 Hz max --> 0
[ 1.004296] spi_imx 30840000.spi: registered child spi0.0
[ 1.004312] spi spi0.1: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.004318] spi spi0.1: spi_imx_setup: cs -517
[ 1.004326] spi spi0.1: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.004424] spi_imx 30840000.spi: registered child spi0.1
[ 1.004439] spi spi0.2: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.004443] spi spi0.2: spi_imx_setup: cs -517
[ 1.004452] spi spi0.2: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.004546] spi_imx 30840000.spi: registered child spi0.2
[ 1.004561] spi spi0.3: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.004567] spi spi0.3: spi_imx_setup: cs -517
[ 1.004574] spi spi0.3: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.004699] spi_imx 30840000.spi: registered child spi0.3
[ 1.004717] spi spi0.4: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.004721] spi spi0.4: spi_imx_setup: cs -517
[ 1.004729] spi spi0.4: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.004824] spi_imx 30840000.spi: registered child spi0.4
[ 1.950304] spi_imx 30840000.spi: registered master spi0
[ 1.951019] spi spi0.0: spi_imx_setup: mode 0, 8 bpw, 2000000 hz
[ 1.951025] spi spi0.0: spi_imx_setup: cs 65
[ 1.951032] spi spi0.0: spi_imx_setup: dir ret: 0
[ 1.951044] spi spi0.0: setup mode 0, 8 bits/w, 2000000 Hz max --> 0
[ 1.951230] spi_imx 30840000.spi: mx51_ecspi_clkdiv: fin: 80000000, fspi: 2000000, post: 2, pre: 9
[ 1.951742] spi_imx 30840000.spi: registered child spi0.0
[ 1.951763] spi spi0.1: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.951769] spi spi0.1: spi_imx_setup: cs 15
[ 1.951776] spi spi0.1: spi_imx_setup: dir ret: 0
[ 1.951787] spi spi0.1: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.951894] spi_imx 30840000.spi: registered child spi0.1
[ 1.951908] spi spi0.2: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.951914] spi spi0.2: spi_imx_setup: cs 64
[ 1.951921] spi spi0.2: spi_imx_setup: dir ret: 0
[ 1.951930] spi spi0.2: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.952038] spi_imx 30840000.spi: registered child spi0.2
[ 1.952053] spi spi0.3: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.952057] spi spi0.3: spi_imx_setup: cs 153
[ 1.952065] spi spi0.3: spi_imx_setup: dir ret: 0
[ 1.952073] spi spi0.3: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.952180] spi_imx 30840000.spi: registered child spi0.3
[ 1.952197] spi spi0.4: spi_imx_setup: mode 0, 8 bpw, 100000 hz
[ 1.952203] spi spi0.4: spi_imx_setup: cs 78
[ 1.952210] spi spi0.4: spi_imx_setup: dir ret: 0
[ 1.952218] spi spi0.4: setup mode 0, 8 bits/w, 100000 Hz max --> 0
[ 1.952336] spi_imx 30840000.spi: registered child spi0.4
[ 1.952363] spi_imx 30840000.spi: probed

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i noticed that the bus gets initialized twice... dont know if thats an issue.

next i entered the follwing command and noticed that the gpio3 (gpiochip2) pins hat the wrong direction mode:

Code

# cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
gpio-6 ( |cd ) in hi IRQ ACTIVE LOW
gpio-12 ( |regulator-usb1-vbus ) out lo ACTIVE LOW
gpio-15 ( |spi_imx ) out hi
gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio:
gpio-42 ( |regulator-usdhc1 ) out hi
gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio:
gpio-64 ( |spi_imx ) in hi
gpio-65 ( |spi_imx ) in hi
gpio-78 ( |spi_imx ) in hi
gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio:
gpio-114 ( |regulator-usdhc2-wla) out hi
gpiochip4: GPIOs 128-159, parent: platform/30240000.gpio, 30240000.gpio:
gpio-131 ( |ldb-bl ) out hi
gpio-142 ( |scl ) out lo
gpio-143 ( |sda ) in lo
gpio-153 ( |spi_imx ) out hi

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Futhermore i modified the spi-imc.c driver file and printed the return value of the gpio_direction_ouput call and also the cs pin numer

see "spi_imx_setup: cs 78"

and "spi_imx_setup: dir ret: 0" for example in the dmesg log at the top.

andreas.paulun@i-graphx.com · Sep 14th 2022

Sadly still not working...

andreas.paulun@i-graphx.com · Sep 13th 2022

Already selected that module...

I hooked up an oscilloscope and Clock, MISO seem to work, CS works only If i use the first (0) CS Pin (The predefined one) when i use the other ones the Line stays High

andreas.paulun@i-graphx.com · Sep 12th 2022

Tried the following device tree without success...

Perhaps I'm missing a kernel module?

Code

&ecspi3 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <5>;
num-cs = <5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>,
<&gpio1 15 GPIO_ACTIVE_LOW>,
<&gpio3 0 GPIO_ACTIVE_LOW>,
<&gpio3 1 GPIO_ACTIVE_LOW>,
<&gpio3 14 GPIO_ACTIVE_LOW>;
status = "okay";
spidev_0@0 {
compatible = "linux,spidev";
reg = <0>;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
};
spidev_1@1 {
compatible = "linux,spidev";
reg = <1>;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
};
spidev_2@2 {
compatible = "linux,spidev";
reg = <2>;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
};
dac@3 {
compatible = "lltc,ltc2632-l12";
reg = <3>;
spi-max-frequency = <10000000>;
};
spidev_4@4 {
compatible = "linux,spidev";
reg = <4>;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
};
};

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andreas.paulun@i-graphx.com · Sep 12th 2022

Hi,

We're using Yocto 5.4-zeus with Distro fus-imx-wayland

andreas.paulun@i-graphx.com · Sep 8th 2022

Hi,

I'm trying to get SPI_A (ecspi3) with multiple chip selects to work,

but only the predefined chip select (gpio5 25) seems to work.

Below my device tree:

Code

&ecspi3 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <5>;
num-cs = <5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>,
<&gpio1 15 GPIO_ACTIVE_LOW>,
<&gpio3 0 GPIO_ACTIVE_LOW>,
<&gpio3 1 GPIO_ACTIVE_LOW>,
<&gpio3 14 GPIO_ACTIVE_LOW>;
status = "okay";
dac@3 {
compatible = "lltc,ltc2632-l12";
reg = <3>;
spi-max-frequency = <10000000>;
};
};
[...]
pinctrl_ecspi3_cs: ecspi3cs {
fsl,pins = <
MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x40000
MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x40000
MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00 0x40000
MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x40000
MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000
>;
};

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I checked that no other node is using or muxing my pins

andreas.paulun@i-graphx.com · Aug 24th 2022

Hi,

can you say if and/or when a new Yocto for the imx8mp release is coming?

I need a newer chromium version, but the meta-browser layer doesn't provide a newer version for Yocto Zeus.

With best regards

Andreas Paulun

andreas.paulun@i-graphx.com · Dec 23rd 2021

Hi,

i got the same problem, but I'm developing using nfsboot.

What do i do?

Simply copying the file to my tftp root next to the ZImage does not solve the problem

andreas.paulun@i-graphx.com · May 31st 2021

All Virtual machine related settings are in the snip attached.

I am using 4 cores, 200GB memory, 4GB RAM

Regards,

Saumya Jain

andreas.paulun@i-graphx.com · May 31st 2021

It still fails for me. with the latest VPC version.

Posts by andreas.paulun@i-graphx.com

Clocking down

Clocking down

New Yocto Version?

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

SPI_A Chip Select

New Yocto Version?

display and emmc build

i.MX8M-Mini Linux Release Y2021.04 (Yocto) build fail issues

i.MX8M-Mini Linux Release Y2021.04 (Yocto) build fail issues