Posts by sfc

Thank you for explaining, that makes it more clear

Tank you for responding

It seems like our understanding of the system is incorrect in this case, could you please help us resolve it

The linux is running with

In our patched device tree with aliases we can see that ttymxc1 is uart2, and the following CPU PADs: (this corresponds to the original image, where ttymxc1 is used for linux output as well and with the same pins)

While UARTC and UARTD are listed in the hardware documentation to be CPU PADs

Update:
We have tried another adapter and it managed to pull the voltage to around 500mV
But there is still a significant difference to UARTD

Hello,

we are experiencing some problems with UARTC, more specifically the RX (on the SBC side).
This was reproduced on one SBC with our image, and on another SBC as delivered with the factory default image.

The problem is as follows: the RX-Pin remains at a very high voltage level of above 2.0V, while recieving data from our USB->TTL adapter.
Additionally it was tested to connect a 300Ohm resistor to GND, and the Voltage level remained around 2.0V as well.
The TX side, as well as UARTD behave correctly.

Is there something we misconfigured? Could you please look into this issue.

Thank you and best
Jakob/SFC

Please find the scope images of revieving and sending data attached (Pin functions/names given are on the SBC side).

Thank you, we can confirm shutdown to be working now!

We have a similar problem on the armstone MX8MP

Shutdown on MX8MP

Maybe it is related

Hi,

I have another question regarding the MX8MP device.
After testing shutdown/poweroff commands with the supplied image with all possible additional parameters it was found that our device always reboots.
In the hardware documentation I was not able to locate any kind of GPIO that could be set to a different level to prevent this behaviour, apparently this is required.
Could you please point me in the correct direction to implement a shutdown procedure that leaves the device in poweroff state until reboot is requested by hardware reset button or powercycle?

Thank you once again
Jakob/SFC

Can't directly help you with your issue but shouldn't the fw_env contain two different copies of the fw_env in two paritions?
typically boot0 and boot1

The issue has been solved
It was missing as "HOSTTOOLS" in our distro, which is now resolved
Thank you for pointing me in the right direction

Hello,

thank you for your help.

I have added the check for crc32 to my bbappend and installed the, so far missing, crc32 binary.
However I still have a mismatch and byte-shift in the very first bytes
It looks like some escape chars are placed instead of 4 bytes, does this point to the 4 bytes of a crc32 problem?
The rest other than the marked part is 100% identical to the binary you provide

I am now building it in your Fedore dev machine and will report back

Hi,

I have a problem with installing the uboot that I compile during the image build proccess.

For some reason it will not be detected as a valid uboot image.

It shows some differences in the first few bytes when comparing to what FS provides, so maybe the compiling proccess is not running correctly? The machine I am using is Ubuntu 22.04 based, can this be part of the problem.

The file is attached

Thank you for your help
Jakob

Hi,

I am trying to create a custom .wic file for the armstoneMX8MP.
I am basing this on meta-fus/wic/fus-uboot-bootpart.wks.in, but it uses the UBOOT_WIC_BINARY and UBOOT_OFFSET.

Those values are not defined in the meta-fus/conf/machine/fsimx8mp.conf, only for other machines.
Am I using the wrong wic to base this off or were they forgotten in the machine conf?

Thank you for your help
Jakob