RTS CTS and XGPIO question

  • Yes. It is rather simple to disable RTS/CTS. This port is UART_B in our device tree, which in turn is the CPU UART port 1. So in armstonea9r2dl.dts (or armstonea9r2q.dts, depending on your CPU type), in section UART, comment the line


    by inserting two slashes // at the beginning. That's all. Now recompile the device tree and download it to the board.

    If there are problems accessing the pins as GPIO, it might need an additional step. Most pads are automatically configured as GPIO if not configured as something else, but unfortunately not all pins. So in rare cases it might be necessary to specify the pad setting explicitly as GPIO. From the common part of the device tree, armstonea9qdl.dtsi, you can see in the IOMUXC section, that UART_B (UART1) uses pads EIM_D19 and EIM_D20 for RTS and CTS (and yes, in this sequence, despite the names that NXP has totally mixed up and where RTS is CTS and vice versa). Now we need similar lines in the node hoggrp-1 a little further above that configure these pads as GPIO:

    1. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x4001b0a8
    2. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x4001b0a8

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