Cannot change output of GPIO1_IO12 (MX6UL_PAD_JTAG_TDO*, Pin #116, GPIO12)

mlanger · Apr 5th 2022

Hello,

I'm trying to alter the output of GPIO12 from console. I did this with various GPIOs before, but this one doesn't change its output from 0 to 1.
Here is what I do:

echo 12 > /sys/class/gpio/export
echo out > /sys/class/gpio/gpio12/direction

echo 1 > /sys/class/gpio/gpio12/value

My Devicetree has SAI2 disabled and adds the GPIO to "hoggrp-1". MX6UL_PAD_JTAG_TDO* doesn't occur anywhere else in the DTS.

DTS snipplet:

[...]

&sai2 {

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_sai2>;

fsl,mclk-out;

status = "disabled";

};

[...]

&iomuxc {

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_hog_1>;

efusa7ul {

pinctrl_hog_1: hoggrp-1 {

fsl,pins = <

[...]

MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x30b0

[...]
>;

};
[...]

I wonder, what am I doing wrong, DTS copiles and resulting DTB is installed on the SoM.

Greetings

mlanger · Apr 6th 2022

Additional information:
Kernel version is:
Linux efus7ull 4.1.15-F+S #1 PREEMPT Thu Feb 22 00:35:02 CET 2018 armv7l armv7l armv7l GNU/Linux

fs-support_PG · Apr 6th 2022

Hello and welcome to the forum

Did you also disable the sound-sgtl5000 node?

There is a reference to the sai2 node and maybe this triggers the pinctrl_sai2, which would reconfigure the pin to SAI2_TX_SYNC

We will test this our self as soon as we can get to it.

Your F&S Support Team

mlanger · Apr 6th 2022

I removed node "sound-sgtl5000" from DTB without success.
Currently, we are investigating the hardware again to check for possible damage from tests.

mlanger · Apr 6th 2022

Inspecting "/sys/firmware/devicetree/base/i2c_gpio" now shows that SGTL5000 is no more configured (was shown as I²C device here before).
Unfortunately, the GPIO still doesn't work.
I'm still investigating. However, if someone could test this, it would help.

Thanks so far.

fs-support_PG · Apr 6th 2022

Hello,

we have tested GPIO1_IO12 on the Efus-STINF with your settings and it works.

Are you using your own Baseboard or the Efus-STINF ?

Could you add a copy of your device tree to your awnser?

Your F&S Support Team

mlanger · Apr 6th 2022

Please excuse the renaming of the DTS - it wasn't supported to be uploaded as .dts.

Also this file might be a bit messy, I apologise for that. Note that CONFIG_EFUSA7UL_ULL is set in my environment.

I do not use a baseboard from F&S. We are running from NAND flash.

fs-support_PG · Apr 7th 2022

Hello,

i cant't find anything wrong in your DTS.

Do you have a Efus-STINF available to check if its working there and if yes, which revision?

Do you have another EfusA7ULL for double checking?

Your F&S Support Team

fs-support_HK · Apr 8th 2022

Just to make sure, you actually measure the voltage on the pin, you do not simply read back the value by software? Because in your configuration, you will *not* see the real pin value when reading the value-file in sysfs. To be possible to do this, you have to add 0x40000000 to your hex value, i.e. 0x400030b0. This enables the so-called SION flag which loops back the general purpose output signal to the general purpose input signal. Then you will also see your own output value as input value. By default this is not the case on any i.MX6 CPU.

Also be careful if you actually have the sound Codec still included in your circuit. The default function of this pin is I2S_SYNC. We configure the sound Codec chip to be the clock master, So this signal is an output on the external Codec and an input on the CPU. If the Codec is not properly reset by a power cycle, then the Codec might still drive this line actively. A warm start like calling reboot might not be enough to bring back the Codec to a passive state. So make sure that the line is not driven by some other device.

Your F&S Support Team

Cannot change output of GPIO1_IO12 (MX6UL_PAD_JTAG_TDO*, Pin #116, GPIO12)

Share

Tags