• Hello,

    I want to communicate with I2C device on I2C_B bus but there seems to be some confusion.

    According to PicoCOMA9X_Hardware_eng.pdf J1-30, 31 is either CAN0 or I2C0. If configured as I2C J1-30 and 31 should be SD3_DATA5 (GPIO7_IO7) and SD3_DATA7 (GPIO7_IO9):

    But in default picocoma9x.dts in pinctrl_i2c1_1 there are GPIO0_IO0 and GPIO0_IO1:


    pinctrl_i2c1_1: i2c1grp-1 {

    fsl,pins = <

    MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1

    MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1




    Which configuration is correct?

    Thank you,


  • The device tree is correct.

    Here is some background information.

    On previous PicoCOM boards based on Samsung CPUs, the I2C and CAN signals were always available on the same CPU pads. So the alternative function was directly available from the pinmux of the CPU. As many customers got used to this "double feature" of these connector pins, we wanted to keep this on the PIcoCOMA9X as well. However there is no such pinmux on any of the NXP CPU pads. So we needed to use *two* CPU pads, one that provides the I2C signal and one that provides the CAN signal. And by making sure that never both functions are active at the same time, we could simply connect the two signals on the B2B-Connector pin.

    So when the CAN_A function is active on pins 30/31, the connector pins are driven by CPU pads SD3_DATA4 and SD3_DATA6 that carry signals for CAN2 of the CPU. But when the I2C_B function is active on pins 30/31, the connector pins are driven by CPU pads GPIO1_IO00 and GPIO1_IO01. And these pins carry signals for I2C1 of the CPU.

    So the hardware manual does not fully reflect the complexity of the situation. But the device tree does, as it supports CAN_A as well as I2C_B. Just disable CONFIG_PICOCOMA9X_CAN_A and enable CONFIG_PICOCOMA9X_I2C_B at the beginning of the device tree, and everything should work as expected. There are some sanity checks later in the device tree that make sure that at most one of these functions is actually active.


    In the past there was also some confusion because the PicoCOM port names as well as the internal CPU ports used numbers. So it was difficult to know if we mean board-standard names or CPU names. In newer specifications like efus and PicoCore, we therefore use letters instead of numbers on our board-standard port names. This was already done in the PicoCOMA9X device tree, so there it is more clear. So CAN_A of the board-standard is implemented by CAN2 of the CPU, I2C_B of the board standard is implemented by I2C1 of the CPU. Unfortunately, the Hardware Manual still uses the numbers, i.e. I2C0 instead of I2C_B and I2C1 instead of I2C_A, which is apparently still confusing, because these are *not* the CPU port names. Actually the old I2C0 board-standard port is implemented by I2C1 of the CPU and the old I2C1 board-standard-port is implemented by I2C4 of the CPU.

    Your F&S Support Team

    F&S Elektronik Systeme GmbH
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    Edited 3 times, last by fs-support_HK ().